? semiconductor components industries, llc, 2012 june, 2012 ? rev. 1 1 publication order number: ntlus3a39pz/d ntlus3a39pz power mosfet ? 20 v, ? 5.2 a, single p ? channel, esd, 1.6x1.6x0.55 mm udfn cool package features ? udfn package with exposed drain pads for excellent thermal conduction ? low profile udfn 1.6 x 1.6 x 0.55 mm for board space saving ? ultra low r ds(on) ? these devices are pb ? free, halogen free/bfr free and are rohs compliant applications ? optimized for power management applications for portable products, such as cell phones, pmp, media tablets, dsc, gps, and others ? battery switch ? high side load switch maximum ratings (t j = 25 c unless otherwise stated) parameter symbol value unit drain-to-source voltage v dss ? 20 v gate-to-source voltage v gs 8.0 v continuous drain current (note 1) continuous drain current (note 1) steady state t a = 25 c i d ? 5.2 a t a = 85 c ? 3.7 t 5 s t a = 25 c ? 6.4 power dissipa- tion (note 1) steady state t a = 25 c p d 1.5 w t 5 s t a = 25 c 2.3 continuous drain current (note 2) steady state t a = 25 c i d ? 3.4 a t a = 85 c ? 2.4 power dissipation (note 2) t a = 25 c p d 0.6 w pulsed drain current tp = 10 s i dm ? 17 a operating junction and storage temperature t j , t stg -55 to 150 c source current (body diode) (note 2) i s ? 1 a lead temperature for soldering purposes (1/8 from case for 10 s) t l 260 c stresses exceeding maximum ratings may damage the device. maximum ratings are stress ratings only. functional operation above the recommended operating conditions is not implied. extended exposure to stresses above the recommended operating conditions may affect device reliability. 1. surface mounted on fr4 board using 1 in sq pad size (cu area = 1.127 in sq [2 oz] including traces). 2. surface-mounted on fr4 board using the minimum recommended pad size of 30 mm 2 , 2 oz. cu. http://onsemi.com p ? channel mosfet ? 20 v 50 m @ ? 2.5 v 39 m @ ? 4.5 v r ds(on) max i d max v (br)dss mosfet udfn6 ( cool ) case 517au see detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. ordering information ae = specific device code m = date code = pb ? free package 81 m @ ? 1.8 v marking diagram 147 m @ ? 1.5 v (top view) (*note: microdot may be in either location) ? 5.2 a s d g 1 6 ae m 1 pin connections
ntlus3a39pz http://onsemi.com 2 thermal resistance ratings parameter symbol max unit junction-to-ambient ? steady state (note 3) r ja 85 c/w junction-to-ambient ? t 5 s (note 3) r ja 55 junction-to-ambient ? steady state min pad (note 4) r ja 200 3. surface-mounted on fr4 board using 1 in sq pad size (cu area = 1.127 in sq [2 oz] including traces). 4. surface-mounted on fr4 board using the minimum recommended pad size of 30 mm 2 , 2 oz. cu. electrical characteristics (t j = 25 c unless otherwise specified) parameter symbol test condition min typ max units off characteristics drain-to-source breakdown voltage v (br)dss v gs = 0 v, i d = ? 250 a ? 20 v drain-to-source breakdown voltage temperature coefficient v (br)dss /t j i d = ? 250 a, ref to 25 c 13 mv/ c zero gate voltage drain current i dss v gs = 0 v, v ds = ? 20 v t j = 25 c ? 1.0 a gate-to-source leakage current i gss v ds = 0 v, v gs = 8.0 v 10 a on characteristics (note 5) gate threshold voltage v gs(th) v gs = v ds , i d = ? 250 a ? 0.4 ? 1.0 v negative threshold temp. coefficient v gs(th) /t j 3.0 mv/ c drain-to-source on resistance r ds(on) v gs = ? 4.5 v, i d = ? 4.0 a 30 39 m v gs = ? 2.5 v, i d = ? 2.0 a 40 50 v gs = ? 1.8 v, i d = ? 1.2 a 55 81 v gs = ? 1.5 v, i d = ? 0.5 a 75 147 forward transconductance g fs v ds = ? 5 v, i d = ? 3.0 a 25 s charges, capacitances & gate resistance input capacitance c iss v gs = 0 v, f = 1 mhz, v ds = ? 15 v 920 pf output capacitance c oss 85 reverse transfer capacitance c rss 80 total gate charge q g(tot) v gs = ? 4.5 v, v ds = ? 15 v; i d = ? 3.0 a 10.4 nc threshold gate charge q g(th) 0.5 gate-to-source charge q gs 1.2 gate-to-drain charge q gd 3.0 switching characteristics, vgs = 4.5 v (note 6) turn-on delay time t d(on) v gs = ? 4.5 v, v dd = ? 15 v, i d = ? 3.0 a, r g = 1 7.2 ns rise time t r 12.2 turn-off delay time t d(off) 34.7 fall time t f 34.8 drain-source diode characteristics forward diode voltage v sd v gs = 0 v, i s = ? 1.0 a t j = 25 c 0.67 1.0 v t j = 125 c 0.56 reverse recovery time t rr v gs = 0 v, dis/dt = 100 a/ s, i s = ? 1.0 a 11.1 ns charge time t a 5.8 discharge time t b 5.3 reverse recovery charge q rr 4 nc 5. pulse test: pulse width 300 s, duty cycle 2%. 6. switching characteristics are independent of operating junction temperatures.
ntlus3a39pz http://onsemi.com 3 typical characteristics figure 1. on ? region characteristics figure 2. transfer characteristics ? v ds , drain ? to ? source voltage (v) ? v gs , gate ? to ? source voltage (v) figure 3. on ? resistance vs. gate ? to ? source voltage figure 4. on ? resistance vs. drain current and gate voltage ? v gs , gate voltage (v) ? i d , drain current (a) figure 5. on ? resistance variation with temperature figure 6. drain ? to ? source leakage current vs. voltage t j , junction temperature ( c) ? v ds , drain ? to ? source voltage (v) ? i d , drain current (a) ? i d , drain current (a) r ds(on) , drain ? to ? source resistance ( ) r ds(on) , normalized drain ? to ? source resistance ( ) ? i dss , leakage (na) v gs = ? 2.5 v ? 3.0 v ? 4.5 to ? 3.5 v ? 1.5 v v ds ? 10 v t j = 25 c t j = ? 55 c t j = 125 c i d = ? 4.0 a t j = 25 c r ds(on) , drain ? to ? source resistance ( ) t j = 25 c ? 1.8 v ? 2.5 v v gs = ? 4.5 v v gs = ? 4.5 v i d = ? 4.0 a t j = 85 c t j = 125 c 100 1000 10000 100000 2 4 6 8 10 12 14 16 18 20 0 2 4 6 8 10 12 14 16 18 20 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 ? 1.8 v ? 2 v 0 2 4 6 8 10 12 14 16 18 20 0.5 1 1.5 2 2.5 0.02 0.03 0.04 0.05 0.06 0.07 0.08 0.09 0.10 0.11 0.12 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 0.020 0.040 0.060 0.080 0.100 0.120 1 3 5 7 9 11 13 15 17 19 ? 1.5 v 0.7 0.8 0.9 1.0 1.1 1.2 1.3 1.4 1.5 1.6 50 25 0 25 50 75 100 125 150
ntlus3a39pz http://onsemi.com 4 typical characteristics figure 7. capacitance variation figure 8. gate ? to ? source and drain ? to ? source voltage vs. total charge ? v ds , drain ? to ? source voltage (v) q g , total gate charge (nc) figure 9. resistive switching time variation vs. gate resistance figure 10. diode forward voltage vs. current r g , gate resistance ( ) ? v sd , source ? to ? drain voltage (v) figure 11. threshold voltage t j , junction temperature ( c) c, capacitance (pf) ? v gs , gate ? to ? source voltage (v) t, time (ns) ? i s , source current (a) ? v gs(th) (v) v gs = 0 v t j = 25 c f = 1 mhz c iss c oss c rss v ds = ? 15 v i d = ? 3.0 a t j = 25 c v ds v gs q gs q gd ? v ds , drain ? to ? source voltage (v) v gs = ? 4.5 v v dd = ? 15 v i d = ? 3.0 a t d(off) t d(on) t f t r t j = 25 c t j = ? 55 c t j = 125 c i d = ? 250 a 1.0 10.0 100.0 1000.0 1 10 100 0.1 1.0 10.0 50 25 0 25 50 75 100 125 150 0 200 400 600 800 1000 1200 1400 1600 1800 0 2 4 6 8 10 12 14 16 18 20 0 3 6 9 12 15 18 0 1 2 3 4 5 024681012 q t 0.2 0.4 0.6 0.8 1.0 1.2 0.15 0.25 0.35 0.45 0.55 0.65 0.75 0.85 figure 12. maximum rated forward biased safe operating area ? v ds , drain ? to ? source voltage (v) ? i d , drain current (a) 0.01 0.1 1 10 100 0.1 1 10 100 0 v gs ? 8 v single pulse t c = 25 c r ds(on) limit thermal limit package limit 10 s 100 s 1 ms 10 ms dc
ntlus3a39pz http://onsemi.com 5 typical characteristics figure 13. fet thermal response t, time (s) r(t), effective transient thermal response ( c/w) r ja = 85 c/w single pulse duty cycle = 0.5 0.2 0.1 0.05 0.02 0.01 1e+00 1e+01 1e+02 1e+03 1e ? 06 1e ? 05 1e ? 04 1e ? 03 1e ? 02 1e ? 01 0 10 20 30 40 50 60 70 80 90 device ordering information device package shipping ? ntlus3a39pztag udfn6 (pb ? free) 3000 / tape & reel NTLUS3A39PZTBG udfn6 (pb ? free) 3000 / tape & reel ?for information on tape and reel specifications, including part orientation and tape sizes, please refer to our tape and reel packaging specifications brochure, brd8011/d.
ntlus3a39pz http://onsemi.com 6 package dimensions udfn6 1.6x1.6, 0.5p case 517au issue o notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. controlling dimension: millimeters. 3. dimension b applies to plated terminal and is measured between 0.15 and 0.30 mm from terminal. 4. coplanarity applies to the exposed pad as well as the terminals. a b e d d2 e2 bottom view b e 6x 0.10 b 0.05 a c c note 3 2x 0.10 c pin one reference top view 2x 0.10 c note 4 a a1 (a3) 0.05 c 0.05 c c seating plane side view l 6x 1 3 4 6 dim min max millimeters a 0.45 0.55 a1 0.00 0.05 a3 0.13 ref b 0.20 0.30 d 1.60 bsc d2 0.15 0.25 e 1.60 bsc e2 0.57 0.67 e 0.50 bsc l 0.20 0.30 *for additional information on our pb ? free strategy and soldering details, please download the on semiconductor soldering and mounting techniques reference manual, solderrm/d. mounting footprint* l1 detail a 0.82 0.43 0.50 pitch 0.35 2x 1.90 dimensions: millimeters 0.32 1 6x soldermask defined l1 ??? 0.15 f 0.55 bsc g 0.25 bsc d1 0.62 0.72 d1 g f 0.10 b a c 0.10 b a c 0.16 0.28 0.68 on semiconductor and are registered trademarks of semiconductor components industries, llc (scillc). scillc reserves the right to mak e changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for an y particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including wi thout limitation special, consequential or incidental damages. ?typical? parameters which may be provided in scillc data sheets and/or specifications can and do vary in different application s and actual performance may vary over time. all operating parameters, including ?typicals? must be validated for each customer application by customer?s technical experts. scillc does not convey any license under its patent rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indemnify and hold scillc and its of ficers, employees, subsidiaries, af filiates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, direct ly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employer. this literature is subject to all applicable copyright laws and is not for resale in any manner. publication ordering information n. american technical support : 800 ? 282 ? 9855 toll free usa/canada europe, middle east and africa technical support: phone: 421 33 790 2910 japan customer focus center phone: 81 ? 3 ? 5817 ? 1050 ntlus3a39pz/d cool is a trademark of semiconductor components industries, llc (scillc). literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 303 ? 675 ? 2175 or 800 ? 344 ? 3860 toll free usa/canada fax : 303 ? 675 ? 2176 or 800 ? 344 ? 3867 toll free usa/canada email : orderlit@onsemi.com on semiconductor website : www.onsemi.com order literature : http://www.onsemi.com/orderlit for additional information, please contact your local sales representative
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